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FET Self-Biasing |
The bias equations for depletion-mode field-effect transistors are repeated in many books - for example, to find the drain current:
This equation is easy to use if the right input parameters are known. However, FET self-bias circuits generate the required negative gate-source voltage by inserting a source resistor in series with the source terminal of the transistor. The resulting positive source voltage results in a negative gate-to-source bias.
Since the drain current depends on gate bias, but the gate bias now depends on drain current, it is soon seen that the solution will require finding the roots of a quadratic equation. The actual solution will yield two roots, of course, but only the one representing the smaller drain current will be valid - the gate-source bias associated with the larger root will actually place the transistor beyond cutoff. That root is mathematically correct but physically meaningless.
While graphical analysis is possible (see above), this is a problem made-to-order for a computerized solution. An Excel spreadsheet has been written which accepts as input several parameters, including a separate gate voltage if the voltage-divider bias technique is used in combination with self-bias. The user should enter the known values into the yellow cells, and the solution will be displayed in the green cells. Several intermediate values are displayed as well, so the user can examine how the solution was achieved.
To download the spreadsheet to your computer, right-click on the link below and choose "Save Link As" or "Save Target As":
